Thin-film thermoelectric device and fabrication method of same

ABSTRACT

A termoelectric  thermoelectric device and method for manufacturing the thermoelectric device. The thermoelectric  thermoelectric device includes at least one deposited film of a thermoelectric material having opposed first and second major surfaces separated by a thickness of the at least one deposited film with the at least one deposited film being patterned to define a plurality of thermoelements arranged in a matrix pattern having rows of alternating conductivity type, a first header having formed thereon a first interconnecting member with the first header mounted on the first major surface of the deposited film such that the first interconnecting member is connected to one side of the plurality of thermoelements and connects adjacent thermoelements of an opposite conductivity type, and a second header having formed thereon a second interconnecting member with the second heads mounted on the second major surface of the deposited film such that the second interconnecting member is connected to an opposite side of said plurality of thermoelements and connects adjacent thermoelements of an opposite conductivity type.

This application claims benefit of Provisional Appln No. 60/042,845filed Mar. 31, 1997.

This invention was made with Government support under ContractsN00014-94-C-0088 and/or N00014-97-C-0088 awarded by the Office of NavalResearch and Contract N00014-97-C-0211 awarded by the Defense AdvancedResearch Projects Agency. The Government has certain rights in theinvention.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to thin-film thermoelectric devices andmethods of manufacturing such devices, and particularly to thin-filmthermoelectric devices with high utilization efficiency and highcooling/packing density and methods of manufacturing such devices.

Thermoelectric thin films have been used to form high-performancethermoelectric devices. Superlattice thermoelectric materials andquantum-well and quantum-dot structured materials have been proposed.However, there exists a need to produce thin-film thermoelectric deviceswith a good thermoelement aspect-ratio for em μm-thick thin-films, and aneed to easily interconnect these thermoelements. The thin-filmthermoelectric devices should also be scalable to a variety of heatloads and manufacturable in large volume (area). The methods used tomanufacture the devices must be amenable to automation, compatible withcascading or multi-staging (leading to a smaller ΔT per stage for ahigher coefficient of performance in a refrigerator or for higherefficiency in a power generator) and is equally applicable to bothcooling and power generation. Further, the device technology wouldenable the insertion of high-ZT thin-films (i.e. films with a figure ofmerit ZT greater than one) into high performance cooling devices whilekeeping the current levels compatible with present-day coolers andsimilar power generation devices.

SUMMARY OF THE INVENTION

An object of the present invention is to provide a thin-filmthermoelectric device and a method of manufacturing the device thatachieves high material utilization efficiency.

Another object of the present invention is to provide a thin-filmthermoelectric device and a method of manufacturing the device thatachieves high cooling/packing density.

A further object of the present invention is to provide a thin-filmthermoelectric device and a method of manufacturing the device that isscalable to a variety of heat loads.

A still further object of the present invention to provide andmanufacture large area thin-film thermoelectric devices.

Still another object is provide a thermoelectric elements that can beused with low-cost power supplies.

These and other objects are achieved by a thermoelectric device having aplurality of thermoelectric elements (i.e. a plurality ofthermoelements) formed using thin films in the range of microns to tensof microns. The elements may be arranged in a matrix pattern withadjacent rows having opposite conductivity type. The elements aredisposed on a header with a pattern of conductive members. Pairs ofadjacent elements of opposite conductivity type are disposed on andconnected by the conductive members. A second header with a secondpattern of conductive members is disposed on top of the elements. Theconductive members of the second header connect adjacent pairs ofconnected elements so that the pairs are connected in series.

These and other objects are also achieved by a method of forming athermoelectric device. In one embodiment, thin films having a thicknesson the order of microns to tens of ductivity type may be formed ondifferent substrates or one film may be formed and later selectivelydoped to provide regions of opposite conductivity. The film or films aredisposed on the first header and the substrates removed. When films ofopposite conductivity type are used, they are arranged in an alternatingmanner. The films are patterned to provide a plurality of thermoelectricelements in a matrix pattern. Pairs of elements, one of eachconductivity type are disposed on respective conductive members on thefirst header. A second header is disposed on the top of the elements.Conductive members on the second header contact the pairs such that thepairs are connected in series.

The device and method according to the invention are scalable to avariety of heat loads and is manufacturable in volume. They are amenableto automation and are compatible with cascading or multistaging.Further, the device and method are applicable to both cooling and powergeneration.

BRIEF DESCRIPTION OF THE DRAWINGS

A more complete appreciation of the invention and many of the attendantadvantages thereof will be readily obtained as the same becomes betterunderstood by reference to the following detailed description whenconsidered in connection with the accompanying drawings, wherein:

FIGS. 1A and 1B are diagrams of n and p type starting materials,respectively, illustrating a step of manufacturing according to theinvention;

FIGS. 2A and 2B are diagrams of segments of the n and p type startingmaterials, respectively, illustrating a step of manufacturing accordingto the invention;

FIG. 3 is a diagram of assembled segments illustrating a step ofmanufacturing according to the invention;

FIG. 4 is a plan view of a header for contacting the assembled segments;

FIG. 5 is a diagram of n and p thin film sections disposed on the headerof FIG. 3 illustrating a step of manufacturing according to theinvention;

FIG. 6 is a diagram of a n and p sections disposed on the header of FIG.3 after patterning, and illustrating a step of manufacturing accordingto the invention;

FIG. 7 is a diagram of a n and p sections of FIG. 6 after metallizationand illustrating a step of manufacturing according to the invention;

FIG. 8 is a plan view of a header for attachment to the n and psections; and

FIG. 9 is a diagram of the device according to the invention having nand p elements with the headers of FIGS. 4 and 8 attached.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

Referring to the drawings, wherein like reference numerals designatecorresponding elements throughout the several view, and moreparticularly to FIG. 1 illustrating a step in the process ofmanufacturing a thin-film thermoelectric device according to theinvention. The device according to the invention is called aBipolarity-Assembled, Series Inter-Connected, Thin-Film ThermoelectricDevice (BASIC-TFTD). It utilizes thin films of thickness in the range ofmicrons to tens of microns, grown or deposited on a substrate usingtechniques such as metallorganic chemical vapor deposition (MOCVD),chemical vapor deposition (CVD), molecular beam epitaxy (MBE) and otherepitaxial/non-epitaxile processes. The thin films can consist ofthin-film superlattice or non-superlattice thermoelectric materials,quantum-well (two-dimensional quantum-confined) and quantum-dot (threedimensional quantum-confined type) structured materials, andnon-quantum-confined materials. Also, materials that are peeled frombulk materials can also be used.

The method of manufacturing the device according to the invention isshown in the figure. In FIGS. 1A and 1B, n-type and p-type films 11 and12 formed as described above are formed on substrates 10. Substrates 10may have the same conductivity type as the overlying films 11 or 12. Thefilms 11 and 12 are shown as multi-layered structures but could also bea single-layer structure. Typical dimensions of these wafers could be 2cm×2 cm (width×length), but other sizes are possible. The substrates aretypically a few mils thick and the film 11 and 12 are typically 5 to 20μm in thickness. The films 11 and 12 are metallized, their respectiveupper surfaces providing a low-resistance contact, such as alow-resistance Peltier contact.

As shown in FIGS. 2A and 2B, the substrates 10 are separated by, forexample, scribing, into many segments 20 and 21. A typical width of thesegments 1 to 5 mm. The size of the substrates 10 before and afterseparation in segments can be varied depending upon the requirements ofthe resulting devices.

The segments 20 and 21 are bonded onto a cooling header or a powerheader 30 with alternating conductivity in FIG. 3. The header can madeof, for example, BeO. The bonding may be carried out using aconventional bonding method. Note that the substrates are facing upwardand that the segments 20 and 21 have a finite separation, in this caseof about 10 μm.

The bonding pattern of the header 30, for an exemplary 8×9 thermoelementmatrix, upon which the segments are bonded is shown in FIG. 4. Thesurfaces of the cooling header/power header 30 that come in contact withthe n- and p-type segments have to be metallized prior to assembly toprovide the necessary low-resistance electrical connection betweenadjacent n- and p-type segments. The header includes a metallization forbonding an n-type segment of size a₁, a metallization for bonding ap-type segment of size a₂, and a metallization for series-connecting n-and p-type segments to form a couple, The metallizations have a width a₃and are separated in the in the length direction by a gap of size b₂ andin the width direction by a gap of size c. Typical dimensions for a₁,a₂, b₁, b₂ and c are given in FIG. 4.

FIG. 4 indicates ranges in dimensions a₁, a₂, a₃, b₁, b₂, and c with,according to the present invention, a₁ ranging from 1 mm to 5 mm, a₂ranging from 1 mm to 5 mm, a₃ ranging from 5 to 50 μm, b₁ and b₂approximately 10 μm, and c ranging from ˜2 to 10 ˜m.

As shown in FIG. 5, the n- and p-type segments are attached to amounting surface of the cooling/power header 30 (i.e. an interconnectingmember between the n- and p-type segments) with the opposed majorsurfaces of the deposited film in each segment arranged parallel to themounting surface of the cooling/power header 30.

Following the bonding of n- and p-type segments, the substrates fromeach of the p- and n-segments are removed selectively without affectingthe films 11 and 12. This can typically be achieved by using selectiveetchants for substrates. Similar substrates, if used for both the n- andp-type segments 20 and 21, can be removed in a single substrate removalprocess. After this process the BASIC-TFTD device structure would lookas shown in FIG. 5 where two pairs of n, p segments are shown forconvenience. The segments 11 and 12, after substrate removal, aresupported on the cooling/power header 30 for stability and handling.

As shown in FIG. 5, the overlying films 11 and 12 consisting of theafore-mentioned thin-film materials are arranged such the depositedfilms have opposed major surfaces separated by a total thickness of thedeposited films such that at least one of the major surfaces is incontact with the cooling/power header 30.

In the next processing step the segments 11 and 12 are patterned in they-direction into sections 60 and 61. This step maybe carried out usingphotolithographic patterning followed by etching, or by laser ablation,for example. The device at this stage is shown in FIG. 6. Typicalparameters of the sections, for two examples, are given as:

EXAMPLE 1 a₁, a₂ ˜1 mm Area = a₁ × a₃ = 0.0005 cm² a₃ ˜50 mm EXAMPLE 2a₁, a₂ ˜5 mm Area = a₁ × a₃ = 0.005 cm² a₃ ˜100 mm

The dimensions indicated for a₃ and c can easily be achieved withconventional microelectronic processing/etching. Also, b, c<<a₁, a₂, anda₃. The invention also provides several advantages. The material removedin etching is very small, leading to good material utilizationefficiency high cooling/packing density can be achieved.

Low resistivity contact metallization is then evaporated on uppersurface of the n- and p-type sections, as shown in FIG. 7. In this step,either the same metallization can be used for both of the n- and p-typesection, or different metallizations can be used (separateevaporations), depending on the contact resistivity requirements.

A top, pre-patterned metallization header 90 is then attached to themetallized sections. Shown in FIG. 8 is a schematic of the metallizationpattern of the metallized header that will serve on the heat-sink side.An 8×9 thermoelement matrix metallization pattern is needed for thisheader, to correspond the metallization pattern of header 30 (see FIG.4). The metal members of the metallization pattern provide alow-resistance contact to the sections 60 and 61.

The two leads, A and B are shown. A positive voltage would be applied tolead A and a negative (or ground) voltage would be applied to lead B forcooling. The metallization pattern pads contacting ntype and ptypeelements are shown by parentheses. The spacing of the patterns matchesthat of the sections.

Electrical shorts between pads are indicated by an “x” in the metallizedheader/heat-sink. These shorts serve to keep the current flow from thetop of the n-type element to the bottom of the n-type element, andsimilarly from the bottom of the p-type element to the top of the prsypeelement. In a cooling device the top is defined as being located on theheat-sink side and the bottom is defined as being on the source side.Such an arrangement will also keep the alternating n- and p-typeelements in series electrically. Thus, according to the invention all ofthe thermoelements are thermally in parallel (between heat-sink andheat-source) and electrically in series.

For this 8×9 matrix of thermoelements, four each of the n- and p-typeelements (identified by “y”) do not participate in the current transportthrough the thickness of the film They only serve to provide theelectrical connection and uniform mechanical strength in the arrange ment of the thermoelements.

In the case of an “m×n” matrix of thermoelements (m is horizontal and nis vertical) and n is odd, with n- and p-type elements alternating alongthe m direction, we can see that the utilization efficiency is:$\frac{{m \times n} - \left( {n - 1} \right)}{m \times n}$This efficiency will nearly approach unity when n is large and m islarge. For example, in the 8×9 matrix, −89% utilization of material isobtained. For a 25×23 element matrix, >96% utilization of material isachieved. Assuming ideal heat-spreading on the heat-sink side header andthe source-side header, the heat spreading in the “non-useful” elementswould be about the same as the “useful” elements. Thus, we can expectmodule efficiency≅(intrinsic couple efficiency×material utilizationefficiency) discussed above. By choosing m>>n (if system constraintspermit) a non-square geometry will minimize the difference betweenmodule and intrinsic couple efficiency. This, of course, assumes idealheat spreading between the thermoelement and the headers. A completeddevice according to the invention, having a set of headers 30 and 90(with the good head spreading characteristics) and n- and p-typeelements interconnected employing an 8×9 matrix, is shown in FIG. 9.

While the sections 60 and 61 disclosed as being approximately square,the aspect ratios of the sections can be adjusted. For example, theaspect ratios can be selected to provide a desired geometry whilesatisfying the above m>>n condition. Also, the aspect ratios can beselected to insure low-current operation, allowing the use of low-costpower supplies for connection to the headers 30 and 90.

The material (superlattice or non-superlattice) for the n- and p-typeelements can be different, as is usually the case in many conventionalbulk materials. However, if the materials are the same for n- and p-typeelements, and if one polarity can be typed-converted to another (p to nor n to p) by a technique, for example impurity-diffusion, withoutdisordering the superlattice or introducing other detrimental effects,then a Bipolar Diffused, Series Interconnected, Thin-Film ThermoelectricDevice (BDSIC-TFTD) can be constructed which does not require theassembly step shown in FIG. 3(i.e. by direct deposition). Thetype-conversion can be performed at a convenient stage in themanufacturing process, such as when the device has the structure shownin FIGS. 5 and 6. Such a device can potentially be manufactured evenmore cost-effectively, with additional advantages and flexibility in thedesign of the device parameters.

The backside of an integrated circuit chip may be used as the cooling orpower header. The backside, especially if it is electrically conducting,needs to be suitably modified to confine the electrical current to thethermoelectric element. One example of suitable preparation is p-njunction isolation in the backside of the chip whereby the current ismade to flow through the intended thermoelectric electric elements, i.e.is confined to the elements, and is not shunted by the conductingbackside of the chip. Other modifications of the backside are possibleto achieve similar confinement of the current.

The backside of the chip should be of good thermal conductivity. Thebackside then may be used to extract heat which could be used for otherpurposes such as power generation. For example, the power generatedusing the heat could be used provide power to other circuits or to othercooling devices.

The BASIC-TFTD according to the invention is scalable to a variety ofheat loads and is manufacturable in large volume (area). It is amenableto automation, is compatible with cascading or multi-staging (leading toa smaller ΔT per stage for a higher coefficient of performance in arefrigerator or for higher efficiency in a power generator) and isequally applicable to both cooling and power generation.

Obviously, numerous modifications and variations os the presentinvention are possible in light of the above teachings. It is thereforeto be understood that, within the scope of the appended claims, theinvention may be practiced otherwise than as specifically describedherein.

1. A thermoelectric device, comprising: at least one deposited film of athermoelectric material having opposed first and second major surfacesseparated by a thickness of the at least one deposited film, saiddeposited film being patterned to define a plurality of thermoelements;a first header having formed thereon a first interconnecting member,said first header mounted on the first major surface of the depositedfilm such that the first interconnecting member is connected to one sideof said plurality of thermoelements and connects adjacent thermoelementsof an opposite conductivity type; and a second header having formedthereon a second interconnecting member, said second header mounted onthe second major surface of the deposited film such that the secondinterconnecting member is connected to an opposite side of saidplurality of thermoelements and connects adjacent thermoelements of anopposite conductivity type.
 2. A device as recited in claim 1,comprising: said thermoelements being arranged in a matrix patternhaving rows of alternating conductivity type.
 3. A device as recited inclaim 2, wherein said first and second interconnecting members areconnected to opposite sides of said thermoelements so that current flowthrough said thermoelements flows from a top to a bottom of a firstthermoelement and from a bottom to a top of a second adjacentthermoelement of a opposite conductivity type from the firstthermoelement.
 4. A device as recited in claim 2, comprising: saidmatrix pattern being m by n in size, where n is odd and m>>n.
 5. Adevice as recited in claim 1, wherein said thermoelements are formed ofa material selected from the group consisting of superlatticethermoelectric materials, quantum well structured materials and quantumdot structured materials.
 6. A device as recited in claim 1, whereinsaid at least one deposited film of thermoelectric material comprisesplural film layers deposited one on top of the other to defineinterfaces between each film layer.
 7. A device as recited in claim 1,wherein said at least one deposited film of thermoelectric materialcomprises a material selected from the group consisting of superlatticematerials, non-superlattice materials, quantum-well structuredmaterials, quantum-dot structured materials and non-quantum-confinedmaterials.
 8. A device as recited in claim 7, wherein the thermoelementshave a thickness of 1 to 10 microns.
 9. A device as recited in claim 7,wherein the matrix pattern comprises a set of first and secondthermoelements arranged in a matrix pattern with said firstthermoelement having a length L1 and a width W1 and said secondthermoelement having a length L2 and a width W2, with a separationdistance C in a row direction and a separation distance D in a columndirection such that C and D are less than L1, L2, and W1, W2.
 10. Adevice as recited in claim 9, wherein: L1 is in a range of 1 mm to 5 mm,L2 is in a range of 1 mm to 5 mm, W1 is in a range of 5 to 50 μm, and W2is in a range of 5 to 50 μm.
 11. A device as recited in claim 10,wherein: D is approximately 10 μm, and C is in a range of ˜2 to 10 μm.12. A method of manufacturing a thermoelectric device, comprising:depositing on a first substrate at least one thermoelectric film of afirst conductivity type having first opposed surfaces separated by athickness of the at least one thermoelectric film of a firstconductivity type; depositing on a second substrate at least onethermoelectric film of a second conductivity type having second opposedsurfaces separated by a thickness of the at least one thermoelectricfilm of a second conductivity type; dividing the first substrate to forma first plurality of thermoelectric segments of the first conductivitytype; dividing the second substrate to form a second plurality ofthermoelectric segments of the second conductivity type; arranging saidfirst and second opposed surfaces of said first and second plurality ofthermoelectric segments on a first header in an alternating pattern ofsaid first and second thermoelectric segments separated by apredetermined distance and using the first header to connect adjacent ofsaid first and second thermoelectric segments; removing the first andsecond substrates; patterning said first and second plurality ofthermoelectric segments to form a plurality of first and secondthermoelements, respectively, said first and second thermoelementshaving first major surfaces interconnected via the first header andsecond major surfaces; and mounting a second header on the second majorsurface of the thermoelements and using the second header to connect atleast one of said first thermolements to at least one of said secondthermoelements.
 13. A method as recited in claim 12, wherein the stepsof depositing comprise: depositing the at least one thermoelectric filmof a first conductivity type and the at least one thermoelectric film ofa second conductivity type with a thickness no more than approximately10 microns on respective first and second substrates.
 14. A method asrecited in claim 12, wherein said first and second headers each have aplurality of conductive members arranged in a matrix pattern, saidmethod comprising: disposing one of the said first thermoelements and anadjacent one of said second thermoelements on one of said conductivemembers of said first header to form a plurality of thermoelement pairs;forming a conductive material on an upper surface of each of said firstand second thermoelements; and disposing said conductive members of saidsecond header on said conductive material on said first and secondthermoelements to connect said pairs of thermoelements in series.
 15. Amethod as recited in claim 14, comprising: connecting said first headerto a heat source; and applying voltages to members of said first andsecond headers so that a current flows from a top to a bottom of saidfirst thermoelement of a pair and from a bottom to a top of said secondthermoelement of said pair.
 16. A method as recited in claim 12, whereinforming said first and second elements comprises: disposing a film onsaid first header; patterning said film to form sections; andselectively doping said sections.
 17. A method as recited in claim 12,comprising: forming said segments using a film having a thickness of nomore than approximately 10 microns from a material selected from thegroup consisting of superlattice materials, quantum well structuredmaterials and quantum dot structured materials.
 18. A method as recitedin claim 12, comprising: patterning said segments to form said first andsecond elements in a matrix pattern with said first thermoelementshaving a width W1 and a length L1 and said second elements having awidth W2 and a length L2; separating said first and secondthermoelements by a first distance C in a row direction and a seconddistance D in a column direction such that C, D are less than L1, L2,W1, W2.
 19. A method as recited in claim 12, wherein arranging first andsecond plurality of segments on a first header comprises; using as afirst header a backside of an integrated circuit chip.
 20. A method asrecited in claim 19, wherein the thermoelectric device is configured toextract heat from said chip for power generation.
 21. A method asrecited in claim 16, wherein forming said first and secondthermoelements comprises: using a first header comprising a backside ofan integrated circuit chip.
 22. A method as recited in claim 16, whereinforming said first and second thermoelements comprises: using a firstheader comprising a backside of an integrated circuit chip; andextracting heat from said chip for power generation.
 23. A method asrecited in claim 18, wherein the steps of patterning and separatingutilize: L1 in a range of 1 mm to 5 mm, L2 in a range of 1 mm to 5 mm,W1 in a range of 5 to 50 μm, and W2 in a range of 5 to 50 μm.
 24. Amethod as recited in claim 23, wherein the steps of patterning andseparating utilize: D approximately 10 μm, and C in a range of ˜2 to 10μm.
 25. A method of manufacturing a thermoelectric device, comprising:disposing a first conductivity type film on a first header with thefirst conductivity type film including at least one deposited film of athermoelectric material having opposed first and second major surfacesseparated by a thickness of the at least one deposited film and one ofthe first and second major surfaces contacting the header; patterningsaid film to form sections; selectively converting the firstconductivity type of selected ones of the patterned sections to a secondconductivity type to define first thermoelements of the firstconductivity type and second thermoelements of the second conductivitytype; and connecting electrically first thermoelements having a firstconductivity type to adjacent thermoelements having said secondconductivity type.
 26. A method as recited in claim 25, whereinselectively converting comprises one of diffusion and ion implantation.27. A method as recited in claim 25, further comprising: disposing onconnected said firs thermoelements and said adjacent thermoelements asecond header comprising a backside of an integrate circuit chip.
 28. Amethod as recited in claim 25, wherein the thermoelectric device isconfigured to extract heat from said chip for power generation.
 29. Amethod as recited in claim 25, wherein the step of disposing a firstconductivity type film on a first header comprises: utilizing as thefirst header a head metallized to electrically connect adjacentthermoelements of opposite conductivity type.
 30. An electronic devicecomprising: a chip; a thermoelectric device comprising plural seriesconnected thermoelements disposed in contact with the chip; and saidthermoelements comprising a deposited high ZT thermoelectric film havingopposed first and second major surfaces separated by a thickness of thedeposited thermoelectric film, one of said opposed first and secondmajor surfaces being in contact with said chip.
 31. The electronicdevice of claim 30, wherein the chip comprises an integrated circuitchip.
 32. The electronic device of claim 31, wherein the thermoelectricdevice is disposed in contact with the backside of the integratedcircuit chip.
 33. The electronic device of claim 32, wherein saidbackside is configured to isolate current flow between each of pluralseries connected thermoelements to the backside of the integratedcircuit chip.
 34. The electronic device of claim 33, wherein saidbackside comprises p-n junctions configured to isolate said currentflow.
 35. The electronic device of claim 30, wherein the plural seriesconnected thermoelements comprise opposite conductivity typesub-elements arranged in a matrix pattern.
 36. The electronic device ofclaim 35, wherein said matrix pattern comprises alternating rows of saidopposite conductivity type sub-elements.
 37. The electronic device ofclaim 35, wherein said matrix pattern comprises a first set of saidsub-elements and a second set of said sub-elements, said sub-elements ofsaid first set having a length L1 and a width W1 and said sub-elementsof said second set having a length L2 and a width W2, with a separationdistance C in a row direction and a separation distance D in a columndirection such that C and D are less than L1, l2, and W1, W2.
 38. Theelectronic device of claim 37, wherein L1 is in a range of 1 mm to 5 mm,L2 is in a range of 1 mm to 5 mm, W1 is in a range of 5 to 50 μm, and W2is in a range of 5 to 50 μm.
 39. The electronic device of claim 38,wherein D is approximately 10 μm, and C is in a range of ˜2 to 10 μm.40. The electronic device of claim 30, wherein the chip comprises: afirst interconnecting member connected to one side of saidthermoelements and connecting adjacent thermoelements of an oppositeconductivity type.
 41. The electronic device of claim 40, wherein thethermoelectric device comprises: a header having formed thereon a secondinterconnecting member, said second header mounted to the second majorsurface of the deposited thermoelectric film such that the secondinterconnecting member is connected to an opposite side of saidthermoelements and connects said adjacent thermoelements of an oppositeconductivity type.
 42. The electronic device of claim 30, wherein thedeposited high ZT thermoelectric film has a range of thickness from 5 to20 μm.
 43. The electronic device of claim 30, wherein the deposited highZT thermoelectric film comprises at least one of a superlatticematerial, a quantum well material, and a quantum-dot material.
 44. Athermoelectric system comprising: a header; and a patternedthermoelectric material deposited directly on the header.
 45. Thethermoelectric system of claim 44, further comprising: an integratedcircuit chip thermally coupled to the thermoelectric material throughthe header.
 46. The thermoelectric system of claim 44, wherein thepatterned thermoelectric material comprises: a deposited thermoelectricfilm having opposed first and second major surfaces separated by athickness of the deposited thermoelectric film, one of said opposedfirst and second major surfaces being in contact with said header. 47.The thermoelectric system of claim 44, wherein the patternedthermoelectric material comprises opposite conductivity typethermoelements arranged in a matrix pattern.
 48. The thermoelectricsystem of claim 47, wherein said matrix pattern comprises alternatingrows of said opposite conductivity type thermoelements.
 49. Thethermoelectric system of claim 48, wherein said header comprisesinterconnecting members configured to connect said alternating rows ofsaid opposite conductivity type thermoelements.
 50. The thermoelectricsystem of claim 47, wherein said matrix pattern comprises a first set ofsaid thermoelements and a second set of said thermoelements, saidthermoelements of said first set having a length L1 and a width W1 andsaid thermoelements of said second set having a length L2 and a widthW2, with a separation distance C in a row direction and a separatingdistance D in a column direction such that C and D are less than L1, L2,and W1, W2.
 51. The thermoelectric system of claim 50, wherein L1 is ina range of 1 mm to 5 mm, L2 is in a range of 1 mm to 5 mm, W1 is in arange of 5 to 50 μm, and W2 is in a range of 5 to 50 μm.
 52. Thethermoelectric system of claim 51, wherein D is approximately 10 μm, andC is in a range of ˜2 to 10 μm.
 53. The thermoelectric system of claim44, wherein the patterned thermoelectric material is a high ZTthermoelectric film.
 54. The thermoelectric system of claim 53, whereinthe hight ZT thermoelectric film comprises at least one of asuperlattice material, a quantum well material, and a quantum-dotmaterial.
 55. The thermoelectric system of claim 53, wherein the high ZTthermoelectric film has a range of thickness from 5 to 20 μm.
 56. Anelectronic device according to claim 30 wherein the chip includes firstinterconnection members connected to the first major surfaces of thethermoelements such that the first interconnecting members connectadjacent thermoelements of opposite conductivity types, the electronicdevice further comprising: a header including thereon secondinterconnecting members, said header mounted on the second majorsurfaces of the thermoelements such that the thermoelements are betweenthe chip and the header and such that the second interconnection membersconnect adjacent thermoelements of opposite conductivity types.